Xilinx offers a "Library Guide for HDL Designs" for each ISE Version and each FPGA Family. This User Guide (UG) lists all available soft and hard macros for the given FPGA family.
For example:
- UG621 for Virtex-5
- UG623 for Virtex-6
- UG768 for 7-Series
Embark on a journey of knowledge! Take the quiz and earn valuable credits.
Take A QuizChallenge yourself and boost your learning! Start the quiz now to earn credits.
Take A QuizUnlock your potential! Begin the quiz, answer questions, and accumulate credits along the way.
Take A QuizGeneral Tech Technology & Software 3 years ago
User submissions are the sole responsibility of contributors, with TuteeHUB disclaiming liability for accuracy, copyrights, or consequences of use; content is for informational purposes only and not professional advice.
No matter what stage you're at in your education or career, TuteeHUB will help you reach the next level that you're aiming for. Simply,Choose a subject/topic and get started in self-paced practice sessions to improve your knowledge and scores.
Ready to take your education and career to the next level? Register today and join our growing community of learners and professionals.
Your experience on this site will be improved by allowing cookies. Read Cookie Policy
Your experience on this site will be improved by allowing cookies. Read Cookie Policy
manpreet
Best Answer
3 years ago
Please tell me where to look for supported DCM/PLL on xilinx fpga technology . Example - DCM_ADV supported in virtex 4 but not in xcv5